Home → Magazine Archive → February 2010 (Vol. 53, No. 2) → Post-Silicon Bug Localization For Processors Using... → Abstract

Post-Silicon Bug Localization For Processors Using IFRA

By Sung-Boem Park, Subhasish Mitra

Communications of the ACM, Vol. 53 No. 2, Pages 106-113
10.1145/1646353.1646377

[article image]


IFRA overcomes major challenges associated with a very expensive step in post-silicon validation of processors — pinpointing a bug location and the instruction sequence that exposes the bug from a system failure, such as a crash.

The full text of this article is premium content

0 Comments

No entries found