IFRA overcomes major challenges associated with a very expensive step in post-silicon validation of processors — pinpointing a bug location and the instruction sequence that exposes the bug from a system failure, such as a crash.
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Home → Magazine Archive → February 2010 (Vol. 53, No. 2) → Post-Silicon Bug Localization For Processors Using... → Abstract
Post-Silicon Bug Localization For Processors Using IFRA
By Sung-Boem Park, Subhasish Mitra
Communications of the ACM,
Vol. 53 No. 2, Pages 106-113
10.1145/1646353.1646377
![[article image]](https://cacm.acm.org/system/assets/0000/2186/012010_iStock_Post-Silicon_Bug.large.jpg?1476779414&1264090673 "aphids")
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