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Will RISC-V Revolutionize Computing?

By Samuel Greengard

Communications of the ACM, Vol. 63 No. 5, Pages 30-32

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Modern computing depends on many components to deliver fast speeds and high performance, yet few play a more integral role than a reduced instruction set computer, commonly known as RISC. Although the instruction set architecture (ISA) comes in different shapes and forms—and it supports numerous systems and devices—there is a common denominator. RISC allows microprocessors to operate with fewer cycles per instruction (CPI) than a complex instruction set computer (CISC).

An ISA is at the heart of computing, of course. "It is the basic vocabulary that allows hardware and software to communicate," says Dave Patterson, professor of computer science at the University of California, Berkeley, and an ACM A.M. Turing Award recipient who essentially coined the term and developed early RISC computing models. Over the last couple of decades, two major entities, Intel and ARM, have largely controlled ISAs. Their proprietary microprocessors run everything from laptops to cloud servers, and smartphones to Internet of Things (IoT) devices. Today, it's difficult to find a computing device without Intel or ARM processors inside.


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