Home → News → Ieee Conference Keynoters Lay Out Path to Exascale... → Full Text

Ieee Conference Keynoters Lay Out Path to Exascale Computing

By HPC Wire

October 11, 2011

[article image]


Three keynote speakers addressed the challenges of exascale computing at the recent IEEE Cluster 2011 conference. The speakers described the obstacles and opportunities involved in building systems 1,000 times more powerful than today's petascale systems.

Software developer Thomas Sterling discussed the need for a new paradigm in programming that will be adaptive, intelligent, asynchronous, and able to get significantly better performance than the current execution model. Exascale computers will likely have millions of cores, and could be developed by 2020.

Cluster designer Liu GuangMing, who designed China's Tianhe-1A supercomputer, gave an overview of the system deployed at the National Supercomputer Center and followed with an analysis of the barriers facing the development of exascale systems.

Chip architect Charles Moore discussed Advanced Micro Devices' new line of accelerated processing units, a class of chip that could power future exascale systems. He said that one advantage of the new line is that you "can use this chip for graphics or as a compute offload or both at the same time."

From HPC Wire
View Full Article

Abstracts Copyright © 2011 Information Inc. External Link, Bethesda, Maryland, USA 

0 Comments

No entries found